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? semiconductor components industries, llc, 2006 november, 2006 ? rev. 10 1 publication order number: mc10ep131/d mc10ep131, mc100ep131 3.3v / 5vecl quad d flip?flop with set, reset, and differential clock description the mc10/100ep131 is a quad master ? slaved d flip ? flop with common set and separate resets. the device is an expansion of the e131 with differential common clock and individual clock enables. with ac performance faster than the e131 device, the ep131 is ideal for applications requiring the fastest ac performance available. each flip ? flop may be clocked separately by holding common clock (c c ) low and c c high, then using the differential clock enable inputs for clocking (c 0 ? 3 , c 0 ? 3 ). common clocking is achieved by holding the differential inputs c 0 ? 3 low and c 0 ? 3 high while using the differential common clock (c c ) to clock all four flip ? flops. when left floating open, any differential input will disable operation due to input pulldown resistors forcing an output default state. individual asynchronous resets (r 0 ? 3 ) and an asynchronous set (set) are provided. data enters the master when both c c and c 0 ? 3 are low, and transfers to the slave when either c c or c 0 ? 3 (or both) go high. the 100 series contains temperature compensation. features ? 460 ps typical propagation delay ? maximum frequency > 3 ghz typical ? differential individual and common clocks ? individual asynchronous resets ? asynchronous set ? pecl mode operating range: v cc = 3.0 v to 5.5 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 3.0 v to ? 5.5 v ? open input default state ? safety clamp on inputs ? q output will default low with inputs open or at v ee ? pb ? free packages are available lqfp ? 32 fa suffix case 873a marking diagram* *for additional marking information, refer to application note and8002/d. http://onsemi.com mcxxx ep131 awlyywwg see detailed ordering and shipping information in the package dimensions sect ion on page 9 of this data sheet. ordering information 32 1 mcxxx ep131 awlyyww 1 qfn32 mn suffix case 488am xxx = 10 or 100 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb ? free package (note: microdot may be in either location)
mc10ep131, mc100ep131 http://onsemi.com 2 v ee 25 26 27 28 29 30 31 32 15 14 13 12 11 10 9 12345678 24 23 22 21 20 19 18 17 16 r 1 c 0 c 0 v cc d 0 r 0 v cc d 2 set r 3 d 3 v ee c 3 c 3 v cc d 1 c 1 c 1 c c c c c 2 r 2 q 0 q 0 q 1 q 1 q 2 q 2 q 3 q 3 32 ? lead lqfp pinout (top view) c 2 table 1. pin description pin d 0 ? 3 * ecl data inputs function c 0 ? 3 *, c 0 ? 3 * c c *, c c * ecl common clock inputs ecl separate clock inputs r 0 ? 3 * ecl asynchronous reset set* ecl asynchronous set q 0 ? 3 , q 0 ? 3 ecl data outputs v cc positive supply v ee negative supply d 3 c 3 r 3 d 2 c 2 r 2 set c c r 1 c 1 d 1 r 0 c 0 d 0 q 3 q 3 q 2 q 2 q 1 q 1 q 0 q 0 s d q q r s d q q r r d q q s r d q q s c 3 c 2 c 1 c 0 c c figure 1. 32 ? lead lqfp pinout (top view) warning: all v cc and v ee pins must be externally connected to power supply to guarantee proper operation. * pins will default low when left open. v ee d l h x x x table 2. truth table s* l l h l h r* l l l h h clk z z x x x q l h h l undef z = low to high transition * pins will default low when left open. the exposed pad (ep) on the qfn ? 32 package bottom is thermally connected to the die for improved heat transfer out of package. the exposed pad must be attached to a heat ? sinking conduit. the pad is electrically connected to v ee . ep for qfn ? 32, only v ee 25 26 27 28 29 30 31 32 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 16 r1 c0 c0 v cc d0 r0 v cc d2 set r3 d3 v ee c3 c3 v cc d1 cc r2 q0 q0 q1 q1 q2 q2 q3 q3 c2 cc c1 c1 c2 figure 2. 32 ? lead qfn pinout (top view) figure 3. logic diagram mc10ep131 mc100ep131
mc10ep131, mc100ep131 http://onsemi.com 3 table 3. attributes characteristics value internal input pulldown resistor 75 k internal input pullup resistor n/a esd protection human body model machine model charged device model > 2 kv > 100 v > 2 kv moisture sensitivity, indefinite time out of drypack (note 1) pb pkg pb ? free pkg lqfp ? 32 qfn ? 32 level 2 level 2 level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in transistor count 935 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d. table 4. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 6 v v ee necl mode power supply v cc = 0 v ? 6 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 ? 6 v v i out output current continuous surge 50 100 ma ma i bb v bb sink/source 0.5 ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm 32 lqfp 32 lqfp 80 55 c/w c/w jc thermal resistance (junction ? to ? case) standard board 32 lqfp 12 to 17 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm qfn ? 32 qfn ? 32 31 27 c/w c/w jc thermal resistance (junction ? to ? case) 2s2p qfn ? 32 12 c/w t sol wave solder pb pb ? free 265 265 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
mc10ep131, mc100ep131 http://onsemi.com 4 table 5. 10ep dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 2) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 70 95 120 70 95 120 70 95 120 ma v oh output high voltage (note 3) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mv v ol output low voltage (note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mv v ih input high voltage (single ? ended) 2090 2415 2155 2480 2215 2540 mv v il input low voltage (single ? ended) 1365 1690 1460 1755 1490 1815 mv v ihcmr input high voltage common mode range (differential configuration) (note 4) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ? 2.2 v. 3. all loading with 50 to v cc ? 2.0 v. 4. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 6. 10ep dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 5) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 70 95 120 70 95 120 70 95 120 ma v oh output high voltage (note 6) 3865 3990 4115 3930 4055 4180 3990 4115 4240 mv v ol output low voltage (note 6) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mv v ih input high voltage (single ? ended) 3790 4115 3855 4180 3915 4240 mv v il input low voltage (single ? ended) 3065 3390 3130 3455 3190 3515 mv v ihcmr input high voltage common mode range (differential configuration) (note 7) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ? 0.5 v. 6. all loading with 50 to v cc ? 2.0 v. 7. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep131, mc100ep131 http://onsemi.com 5 table 7. 10ep dc characteristics, necl v cc = 0 v, v ee = ? 5.5 v to ? 3.0 v (note 8) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 70 95 120 70 95 120 70 95 120 ma v oh output high voltage (note 9) ? 1135 ? 1010 ? 885 ? 1070 ? 945 ? 820 ? 1010 ? 885 ? 760 mv v ol output low voltage (note 9) ? 1935 ? 1810 ? 1685 ? 1870 ? 1745 ? 1620 ? 1810 ? 1685 ? 1560 mv v ih input high voltage (single ? ended) ? 1210 ? 885 ? 1145 ? 820 ? 1085 ? 760 mv v il input low voltage (single ? ended) ? 1935 ? 1610 ? 1870 ? 1545 ? 1810 ? 1485 mv v ihcmr input high voltage common mode range (differential configuration) (note 10) v ee +2.0 0.0 v ee +2.0 0.0 v ee +2.0 0.0 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. input and output parameters vary 1:1 with v cc . 9. all loading with 50 to v cc ? 2.0 v. 10. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 8. 100ep dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 11) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 70 95 120 75 97 120 80 105 130 ma v oh output high voltage (note 12) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mv v ol output low voltage (note 12) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mv v ih input high voltage (single ? ended) 2075 2420 2075 2420 2075 2420 mv v il input low voltage (single ? ended) 1355 1675 1355 1675 1355 1675 mv v ihcmr input high voltage common mode range (differential configuration) (note 13) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to ? 2.2 v. 12. all loading with 50 to v cc ? 2.0 v. 13. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep131, mc100ep131 http://onsemi.com 6 table 9. 100ep dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 14) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 70 95 120 75 97 120 80 105 130 ma v oh output high voltage (note 15) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mv v ol output low voltage (note 15) 3055 3180 3305 3055 3180 3305 3055 3180 3305 mv v ih input high voltage (single ? ended) 3775 4120 3775 4120 3775 4120 mv v il input low voltage (single ? ended) 3055 3375 3055 3375 3055 3375 mv v ihcmr input high voltage common mode range (differential configuration) (note 16) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to ? 0.5 v. 15. all loading with 50 to v cc ? 2.0 v. 16. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 10. 100ep dc characteristics, necl v cc = 0 v, v ee = ? 5.5 v to ? 3.0 v (note 17) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 70 95 120 75 97 120 80 105 130 ma v oh output high voltage (note 18) ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 mv v ol output low voltage (note 18) ? 1945 ? 1820 ? 1695 ? 1945 ? 1820 ? 1695 ? 1945 ? 1820 ? 1695 mv v ih input high voltage (single ? ended) ? 1225 ? 880 ? 1225 ? 880 ? 1225 ? 880 mv v il input low voltage (single ? ended) ? 1945 ? 1625 ? 1945 ? 1625 ? 1945 ? 1625 mv v ihcmr input high voltage common mode range (differential configuration) (note 19) v ee +2.0 0.0 v ee +2.0 0.0 v ee +2.0 0.0 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 17. input and output parameters vary 1:1 with v cc . 18. all loading with 50 to v cc ? 2.0 v. 19. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10ep131, mc100ep131 http://onsemi.com 7 table 11. ac characteristics v cc = 0 v; v ee = ? 3.0 v to ? 5.5 v or v cc = 3.0 v to 5.5 v; v ee = 0 v (note 20) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum frequency (see figure 4. frequency vs. v outpp and jitter) > 3 > 3 > 3 ghz t plh , t phl propagation delay to c 0 ? 3 output differential c c r 0 ? 3 set 320 320 320 300 450 450 430 430 520 520 520 550 380 400 380 380 460 500 480 460 580 600 580 580 450 450 450 400 560 560 560 530 650 650 700 650 ps t rr set/r0 ? 3 recovery 290 210 290 210 350 280 ps t s t h setup time hold time 120 80 120 80 120 80 ps t pw minimum pulse rate set, r 0 ? 3 550 400 550 400 550 400 t jitter cycle ? to ? cycle jitter (see figure 4. frequency vs. v outpp and jitter) 0.2 < 1 0.2 < 1 0.2 < 1 ps t r t f output rise/fall times q, q (20% ? 80%) 110 180 250 125 200 275 150 230 300 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 20. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50 to v cc ? 2.0 v.
mc10ep131, mc100ep131 http://onsemi.com 8 0 100 200 300 400 500 600 700 800 0 1000 2000 3000 4000 5000 6000 figure 4. frequency vs. v outpp and jitter frequency (mhz) 1 2 3 4 5 6 7 8 (jitter) figure 5. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v
mc10ep131, mc100ep131 http://onsemi.com 9 ordering information device package shipping ? mc10ep131fa lqfp ? 32 250 units / tray mc10ep131fag lqfp ? 32 (pb ? free) 250 units / tray mc10ep131far2 lqfp ? 32 2000 / tape & reel mc10ep131far2g lqfp ? 32 (pb ? free) 2000 / tape & reel mc100ep131fa lqfp ? 32 250 units / tray mc100ep131fag lqfp ? 32 (pb ? free) 250 units / tray mc100ep131far2 lqfp ? 32 2000 / tape & reel MC100EP131FAR2G lqfp ? 32 (pb ? free) 2000 / tape & reel mc10ep131mng qfn ? 32 (pb ? free) 74 units / tray mc10ep131mnr4g 1000 / tape & reel mc100ep131mng 74 units / tray mc100ep131mnr4g 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc10ep131, mc100ep131 http://onsemi.com 10 package dimensions 1 8 9 17 25 32 ae ae p detail y base n j d f metal section ae ? ae g seating plane r q w k x 0.250 (0.010) gauge plane e c h detail ad detail ad a1 b1 v1 4x s 4x 9 ? t ? ? z ? ? u ? t?u 0.20 (0.008) z ac t?u 0.20 (0.008) z ab 0.10 (0.004) ac ? ac ? ? ab ? m 8x ? t ? , ? u ? , ? z ? t?u m 0.20 (0.008) z ac 32 lead lqfp case 873a ? 02 issue c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane ? ab ? is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums ? t ? , ? u ? , and ? z ? to be determined at datum plane ? ab ? . 5. dimensions s and v to be determined at seating plane ? ac ? . 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.250 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane ? ab ? . 7. dimension d does not include dambar protrusion. dambar protrusion shall not cause the d dimension to exceed 0.520 (0.020). 8. minimum solder plate thickness shall be 0.0076 (0.0003). 9. exact shape of each corner may vary from depiction. dim a min max min max inches 7.000 bsc 0.276 bsc millimeters b 7.000 bsc 0.276 bsc c 1.400 1.600 0.055 0.063 d 0.300 0.450 0.012 0.018 e 1.350 1.450 0.053 0.057 f 0.300 0.400 0.012 0.016 g 0.800 bsc 0.031 bsc h 0.050 0.150 0.002 0.006 j 0.090 0.200 0.004 0.008 k 0.450 0.750 0.018 0.030 m 12 ref 12 ref n 0.090 0.160 0.004 0.006 p 0.400 bsc 0.016 bsc q 1 5 1 5 r 0.150 0.250 0.006 0.010 v 9.000 bsc 0.354 bsc v1 4.500 bsc 0.177 bsc b1 3.500 bsc 0.138 bsc a1 3.500 bsc 0.138 bsc s 9.000 bsc 0.354 bsc s1 4.500 bsc 0.177 bsc w 0.200 ref 0.008 ref x 1.000 ref 0.039 ref
mc10ep131, mc100ep131 http://onsemi.com 11 package dimensions qfn32 5*5*1 0.5 p case 488am ? 01 issue o seating 32 x k 0.15 c (a3) a a1 d2 b 1 9 16 17 32 2 x 2 x e2 32 x 8 24 32 x l 32 x bottom view exposed pad top view side view d a b e 0.15 c pin one location 0.10 c 0.08 c c 25 e a 0.10 b c 0.05 c notes: 1. dimensions and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm terminal 4. coplanarity applies to the exposed pad as well as the terminals. plane dim min nom max millimeters a 0.800 0.900 1.000 a1 0.000 0.025 0.050 a3 0.200 ref b 0.180 0.250 0.300 d 5.00 bsc d2 2.950 3.100 3.250 e 5.00 bsc e2 e 0.500 bsc k 0.200 ??? ??? l 0.300 0.400 0.500 2.950 3.100 3.250 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.50 pitch 3.20 0.28 3.20 32 x 28 x 0.63 32 x 5.30 5.30 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc10ep131/d eclinps is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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